Mixed-Signal IP
Standards Based IP
  - PCIE Gen1/2/3 PHY
  - SATA I/2 PHY
  - XAUI PHY
  - CEI-6G-SR-PHY
  - SerialLite PHY & PCS
  - ARM HSSTP PHY & Link
  - PCIE Gen4 PHY (In Lab)
Analog IP
  - ADC, LVDS I/O, PLL
Customer Specific:
  - Custom SerDes for automobile /
    ADC / other applications
Foundries & Technology
Foundries
     - TSMC,
     - Globalfoundries,
     - Tower

Technology Nodes
     - 180nm,  130nm,
     - 55nm 40nm,
     - 28nm, 22nm,
     - 16FF,  14FF,
     - 7FF, 6FF, 4FF, 5FF, 3FF
Services
Design Services
     - Customization / porting of  customer’s
        own technology
     - Complete integration services of IP
        into customer’s SOCs
     - Synthesis
     - DFT
     - Place & Route
     - Analog/Mixed Signal Design
     - Analog Layout

Turn-key ASIC Supply
      - RTL to Volume
Semiconductor IPs
Copyright Fidelity Technologies Pte Ltd May 2024
Design
IP, IC & Design Service